I'm going off what I remember from a decade ago when working on embedded CPUs that have an Ethernet interface. IIRC, the activity LED -- whether a separate LED than the link LED, or combined as a single LED -- is typically wired to the PHY (the chip which converts analog signals on the wire/fibre into logical bits), as part of its transceiver functions. But some transceivers use a mechanism separate from the typical interface (eg SGMII) to the MAC (the chip which understands Ethernet frames; may be integrated into the PHY, or integrated into the CPU SoC). That auxiliary interface would allow the MAC to dictate what the LED should indicate.

In either case, there isn't really a prescribed algorithm for what level of activity should warrant faster blinking, and certainly not any de facto standard between switch and NIC manufacturers. But generally, there will be something like 4 different "speeds" of blinking, based on whatever criteria the designers chose to use