The LogicFolding design is really interesting. I'm eager to see benchmarks to confirm the performance improvements. If it pans out, they have opened a whole new avenue of chip design beyond the diminishing returns of Moore's law.

LogicFolding splits logic across two active silicon layers bonded face to face, with roughly 50 million vertical interconnects at a pitch of about 1.5 micrometers. Because signals travel shorter distances, Huawei says it could lower operating voltage while raising density.

That's a lot of interconnects!