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submitted 2 months ago by Beep@lemmus.org to c/technology@lemmy.world
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[-] craigers@lemmy.world 32 points 2 months ago

Just a reminder for anyone that thinks 3nm chips means the transistors themselves are only 3nm, they are bigger than that. 3nm is the marketing name for the fab process they are using.

[-] kbobabob@lemmy.dbzer0.com 27 points 2 months ago* (last edited 2 months ago)

Close, except it's not a marketing term. It's part of a published IEEE standard.

The actual gate pitch and metal pitch vary by manufacturer and process type.

From Wikipedia:

The term "3 nanometer" has no direct relation to any actual physical feature (such as gate length, metal pitch, or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by IEEE Standards Association Industry Connection, a 3 nm node is expected to have a contacted gate pitch of 48 nanometers, and a tightest metal pitch of 24 nanometers.[12]

[-] AnUnusualRelic@lemmy.world 7 points 2 months ago

So, the IEEE has an actual norm for marketing speak.
Which, honestly, ought to happen more often.

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this post was submitted on 05 Feb 2026
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